An open and competitive architecture won’t happen unless there is this involvement. I’d really like to see RISC become the platform of choice for FOSS, but we’ve got a bit of a catch-22: we need manufacturers to make these products viable, yet all too often when they do it comes will strings attached, proprietary blobs, and owner restrictions. Here is the thing, you keep asking low level questions (or ones that can only be answered in a low level way because of what RISC-V actually is), and then get seemingly upset when we answer that way. Micro Magic's new CPU prototype is seen right here working on an Odroid board. Because RISC-V doesn’t dictate the implementation, extra instructions for emulation aren’t guaranteed to matter. By. Marketing especially unethical marketing by its nature is not about communication and persuasion on the merits but about subverting your judgement. On the Ryzen-powered Linux system, I used the utility turbostat to get both Core and Package power readings while the tests were running. So calling conventions, etc aren’t defined. All of this sounds very exciting—Micro Magic's new prototype is delivering solid smartphone-grade performance at a fraction of the power budget, using an instruction set that Linux already runs natively on. Scenario 1: Apple builds an ARM CPU just as fast as an x86 CPU, and is able to leverage its own ecosystem to deliver a modest improvement in performance per watt… But there isn’t a specific standard so that peripherals all work the same, or have the same memory addresses, etc for a microcontroller. Even at its efficiency-first 3GHz clockrate, the Micro Magic CPU outperformed a Qualcomm Snapdragon 820. Part of the difficulty in evaluating Micro Magic's claim for its new CPU lies in figuring out just what a CoreMark is and how many of them are needed to make a fast CPU. Still, this is an exciting development. CPU Benchmark Hierarchy 2020: Intel and AMD Processors Ranked. 10 Best SSDs you can buy today Gadget Flow. To put that in perspective, last year’s Snapdragon 865 with the 5th gen AI Engine featured 15 … Micro Magic Inc.—a small digital design agency in Sunnyvale, California—has ... Home PC Apps New RISC-V CPU claims recordbreaking efficiency per watt. In 2004, it was reborn under its original name by the original founders—Mark Santoro and Lee Tavrow, who originally worked at Sun and led the team that developed the 300MHz SPARC microprocessor. “World’s best CPU performance per watt”: Testing conducted by Apple in October 2020 using preproduction 13-inch MacBook Pro systems with Apple M1 chip and 16GB of RAM. I’m bothered about the general purpose baseline versus the use case specific implementation issues. . Jim Salter Can they scale to more demanding uses? Post sell off of ARM I feel there has been an uptick in RISC-V astroturfing. Higher results in the chart represent better value in terms of more performance per dollar. New RISC-V CPU claims recordbreaking performance per watt Micro Magic's new CPU offers decent performance with record-breaking efficiency. This rate is typically measured by performance on the LINPACK benchmark when trying to compare between computing systems: an example using this is the Green500 list of supercomputers. There is also the open source Hummingbird processors that are aiming at the Cortex-M space. November 30, 2020. gokul nath. The industry then broke down into industrial use versus game use. At roughly a quarter the performance of world-leading x86 and ARM mobile processors, the Micro Magic CPU doesn't sound like much yet. Where the balance lies is a question between RISC-V, OS vendors and IHVs, and consumers and I think there is some scope for discussion. I think this really needs a technical vision articulating examining what is and isn’t possible then a deeper look at the gotchas and whether vendors will cooperate or not, and the use and abuse of patents and copyright to stop an advance in this area. In that SolarPV sector it’s more about heat management and durability when exposed to UV. It is indeed good advice to study the data and the rules behind what generated the data. Well you can see some of that discussed in the FAQ, and you can get into the weeds by looking at the implementer’s guide. CNMN Collection At an abstract level I don’t really care whether transcoding is done via hardware or software (ditto support for VMs and hooks or subsystem mechanisms for different OS to run at the same time). But when we look at M1, we see a massive 3x improvement in performance per watt. I’m sure someone will find a use. PC Apps; New RISC-V CPU claims recordbreaking efficiency per watt. The Snapdragon 820 isn't world-class anymore, but it's no slouch, either—it was the processor in the US version of Samsung's Galaxy S7. 0. Literally, it measures the rate of computation that can be delivered by a computer for every watt of power consumed. Huang demonstrated the CPU—running on an Odroid board—to EE Times at 4.327GHz/0.8V and 5.19GHz/1.1V. As for whether it is good for all things all the time we don’t really know so comparing them to currents major CPUs isn’t an exact comparison. With modern backend cloud implementations being available in the PS5 for some cases the fastpath will be over an external network.). I think you have to just look at the spec or trust me when I say the core spec defines a thoroughly modern CPU with feature sets on par with any modern CPU, I also think you need to define what you mean by transcoding, because it feels alien to my understanding of the term, After a lot of thought I suspect by transcoding you mean additional instructions to facilitate emulating other architectures (for example x64) vit a JIT or AOT compiler, and yes there is working group J that is looking into that, however that may not be the right approach. I’m a bit sceptical of RISC-V as it seems more of an American thing, Oh china is biting pretty hard on RISC-V as well. The material on this site may not be reproduced, distributed, transmitted, cached or otherwise used, except with the prior written permission of Condé Nast. Ad Choices. https://nequalsonelifestyle.com/2020/12/06/mm-riscv-vs-rock64-arm/. I’m just happy being able to broach the subject. In computing, performance per watt is a measure of the energy efficiency of a particular computer architecture or computer hardware. While we've seen a screenshot of an 8,200 CoreMark score, and we've seen a 69mW power reading, it's not entirely clear that the power reading was representative of the entire benchmark run. Jim Salter Andy Huang 200mW. By Paul Alcorn 27 November 2020. Core performance with Nuvia’s Phoenix. All we needed to do here was clone its GitHub repository, then issue a make command—optionally, with arguments XCFLAGS="-DMULTITHREAD=8 -DUSE_FORK=1" if we want to test on multiple threads/cores at once. This can be annoying when you try to have an objective conversation, but that is human nature I suppose, haha. RISC-V doesn’t guarantee open implementations, that is up to implementors to decide. I’m not getting into whataboutary or having words put in my mouth and as I think we’ve covered everything this is probably a good place to end discussion. Ars may earn compensation on sales from links on this site. © 2020 Condé Nast. One AMD Ryzen Embedded V2000 Series processor can provide twice the multi-threaded performance-per-watt, up to 30 percent better single-thread CPU performance and up to 40 percent better graphics performance over the previous generation. Micro Magic Inc.—a small electronic design firm in Sunnyvale, California—has produced a prototype CPU that is several times more efficient than world-leading competitors, while retaining reasonable raw performance. This is all they don’t tell you. The Micro Magic CPU is, for the moment, single-core and single-threaded—although Huang says it could "easily" be built as a 25-core part. Performance per watt refers to the ratio of peak CPU performance to average power consumed using select industry standard benchmarks. Ars Technica summarises and looks at the various claims made by Micro Magic about their RISC-V core. RISC-V could implement an x86 compatibility mode like apple, but for users like myself though, I don’t really see much benefit in emulating x86 code and I suspect most people who find RISC-V appealing aren’t that interested in emulating x86 either. “World’s best CPU performance per watt”: Testing conducted by Apple in October 2020 using preproduction 13-inch MacBook Pro systems with Apple M1 chip and 16GB of RAM. Two charts below (currently on-sale and all-time value) displays the top Videocards in terms of value. - Dec 4, 2020 11:15 am UTC. Micro Magic was originally founded in 1995 and was purchased by Juniper Networks for $260 million. What the Chinese are up to at a hardware level is a response but I’m fearing the Chinese are basically taking an open system and (like NVidia who are ten times worse than AMD/ATI ever were) are effectively closing it in practice. We're also still taking a pretty fair amount of Micro Magic's claims at face value. o New Willow Cove CPU core with significant frequency uplift leveraging 10nm SuperFin technology advancements. This is enough to let us know that the Micro Magic chip in its current form isn't a world-class competitor for traditional ARM and x86 CPUs in phone or laptop applications—but it's much closer to them than previous RISC-V implementations have been. New RISC-V CPU Claims Recordbreaking Performance Per Watt 1 min read December 4, 2020 Hmmmmmm shares a report from Ars Technica: Micro Magic Inc. — a small electronic design firm in Sunnyvale, California — has produced a prototype CPU that is several times more efficient than world-leading competitors, while retaining reasonable raw performance . But I still don’t think you get it, RISC-V is a ISA, just an ISA. Qualcomm says the Snapdragon 888 boasts three times more performance per watt over the previous generation, as well as 26 tera operations per second (TOPS). I do agree with your comments on why the Chinese are using RISC-V and other CPUs and what they are used for. Apple specifically needed backwards compatibility in order to run their customer’s proprietary mac software, but not everyone is as tied down to x86 software compatibility. We would do the same if we were in their shoes. That is is. Micro Magic adviser Andy Huang claimed the CPU could produce 13,000 CoreMarks (more on that later) at 5GHz and 1.1V while also putting out 11,000 CoreMarks at 4.25GHz—the latter all while consuming only 200mW. With their projections for the Phoenix ARM core, Nuvia is claiming a performance per Watt advantage over the current core offerings from Apple, Qualcomm, Intel, and AMD. Included in these lists are CPUs designed for servers and workstations (such as Intel Xeon and AMD EPYC/Opteron processors), desktop CPUs … I still have an Apple M1 Mac Mini on hand, as well as a Ryzen 7 4700U-powered Acer Swift 3, so those were my test systems for comparison. I’m a bit sceptical of RISC-V as it seems more of an American thing and wonder if pushing RISC-V is less about technical and equity issues and more about who ultimately controls and influences the CPU platform. Huang 5.19GHz/1.1V.Later Ryzen 4700u SiFive Mark Santoro Lee Tavrow We're Ars ... promising that the M1 will offer the world's best CPU performance per watt. This concerns me a great deal because while x86 has kind of been grandfathered in as a platform where FOSS can thrive, for most new devices coming out we aren’t so fortunate and very often we’re forced to hack into our own devices for the right to run independent software. The main problem at the abstract level is core versus extended functionality. RISC-V is one of the ways they are doing that, along with RISC-V, MIPS, ARM, and x86. Implementations are left to implementors. Don’t beat yourself up, the M1 did well in some benchmarks and poorly in others. The x86 memory model is more strict and emulating it in software is inefficient. When we look back at the single‑threaded performance of low‑power silicon in the Mac, gains in performance per watt have been very small from one chip to the next. I gave my Ryzen and Apple processors the benefit of every possible doubt when generating the above charts—I used core power (not total package power) on the Ryzen 4700U and ran tests with the Gnome3 desktop shut down. Performance per watt on Micro Magic's new CPU is eye-popping as compared to typical systems. Sorry but I don’t get what you are saying. Corey Gaskin - Nov 10, 2020 6:38 pm UTC Now that we understood all that, the next step in order to better evaluate Micro Magic's claims was to run a few CoreMark benchmarks of our own. With both M1 and this there is a reason for healthy skepticism, even if the results ultimately prove out in the end. 232. That's triple the efficiency of the Ryzen 4700u running single-threaded and a little better than par with it when the Ryzen's running an optimally multithreaded workload. I hear what you are saying, but I think you are looking for RISC-V to be more than it is, and that it wants to be. New RISC-V CPU claims recordbreaking performance per watt Thom Holwerda 2020-12-04 Hardware 26 Comments Ars Technica summarises and looks at the various claims made by Micro Magic about their RISC-V core. Huang demonstrated the CPU—running on an Odroid board—to EE Times at 4.327GHz/0.8V and 5.19GHz/1.1V. The 5nm M1 system-on-a-chip (SoC) features an 8-core CPU, which the company claims delivers the best performance-per-watt of any processor on the market, and up to … You would be better served by talking in a less technical way, and in one that emphasizes clarity. With that said, it's worth pointing out that—if we take Micro Magic's numbers for granted—they're already beating the performance of some solid mobile phone CPUs. I’m content to leave thinsg there for now. Based on the idea that Ampere Computing has to offer at least a 20 percent price/performance advantage at the chip level compared to the best that Intel and AMD can throw at the cost per performance per watt equation that dominates the buying decisions of the hyperscalers and cloud builders that Ampere Computing is targeting. (In some cases CPU was actually faster than the hardware renderer due to the technology of the time. Micro Magic's new CPU prototype is seen here running on an Odroid board. Micro Magic's RISC-V CPU delivers about 1/4 of the raw performance of a single Apple M1 Firestorm core at its hyper-efficient 3GHz clockrate. So I can see this chip stuff in the lower power market becoming very dominant, provided the applications can keep the processors cool. RISC-V doesn’t concern itself with operating system interoperability but to dictate that would be to limit implentors. No idea and the marketing puff doesn’t say. — AMD Ryzen Embedded V2000 Series processors deliver double the cores 1, up to 2x the performance-per-watt 2 and an estimated 15 percent IPC uplift 3 over the previous generation —. The simplicity of the design—RISC-V requires roughly one-tenth the opcodes that modern ARM architecture does—further simplifies manufacturing concerns, since RISC-V CPU designs can be built in shuttle runs, sharing space on a wafer with other designs. At this point I’d be happy if someone with influence produce a discussion document covering things like acces to instruction sets, interoperability with things like transcoding, the OS and VM layers, support for end users investments in software, the use of escrow and barriers such as copy protection and copyright. (It's worth noting that we had no way to run CoreMark on the M1's slower, less battery-hungry Icestorm cores only.). Even aside from hardware considerations like GPU and LTE modem, creating an entire Android phone based on a non-ARM architecture is likely to be a much bigger undertaking. As a FOSS user, what I want most is a very consistent and reliable boot strapping process where the owner is in control with no proprietary dependencies. This is the level I’m kind of discussing. This may well be the same tactic for the processors, you can imagine an array of these devices working at low bandwidth/demand feeding a centralised conventional chip with heavily curated data, in effect doing all the housekeeping which could massively improve performance and efficiency.